RISCV instruction set from "summary" of Computer Organization and Design RISC-V Edition by David A. Patterson,John L. Hennessy
The RISC-V instruction set is a set of instructions that provide a foundation for software programs and enable efficient execution of operations. It is a flexible and open instruction set architecture that can be tailored to the needs of different applications.- The RISC-V instruction set is a simple and efficient Reduced Instruction Set Computer (RISC) architecture that allows for high performance computing operations.
- The use of explicit registers promotes better control of the Memory Address Register while reducing instruction lengths because only register numbers are specified.
- Through the elimination of fixed-length complex instructions, safety in execution and portability across different parts of the system can be ensured.
- Its modular design enables use in both small and large processors, allowing for user flexibility and customisability.
- It reduces complexity by focusing on basic and commonly used instructions, making it easier to read and understand code.
- Additionally, Developers can easily customize existing instruction sets to create optimized applications suited to their desired purpose.
